Firmware SDK
twr_uart.h
1 #ifndef _TWR_UART_H
2 #define _TWR_UART_H
3 
4 #include <twr_tick.h>
5 #include <twr_fifo.h>
6 
10 
12 
13 typedef enum
14 {
17 
20 
22  TWR_UART_UART2 = 2
23 
25 
27 
28 typedef enum
29 {
32 
35 
38 
41 
44 
47 
49 
51 
53 
54 #define _TWR_UART_SETTING_DATA_BITS_7 0x07 << 4
55 #define _TWR_UART_SETTING_DATA_BITS_8 0x08 << 4
56 
57 #define _TWR_UART_SETTING_PARITY_NONE 0x00 << 2
58 #define _TWR_UART_SETTING_PARITY_EVEN 0x02 << 2
59 #define _TWR_UART_SETTING_PARITY_ODD 0x03 << 2
60 
61 #define _TWR_UART_SETTING_STOP_BIT_1 0x00
62 #define _TWR_UART_SETTING_STOP_BIT_2 0x02
63 #define _TWR_UART_SETTING_STOP_BIT_15 0x03
64 
66 
67 typedef enum
68 {
70  TWR_UART_SETTING_8N1 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_1,
71 
73  TWR_UART_SETTING_8E1 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_EVEN | _TWR_UART_SETTING_STOP_BIT_1,
74 
76  TWR_UART_SETTING_8O1 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_ODD | _TWR_UART_SETTING_STOP_BIT_1,
77 
79  TWR_UART_SETTING_8N2 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_2,
80 
82  TWR_UART_SETTING_8E2 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_EVEN | _TWR_UART_SETTING_STOP_BIT_2,
83 
85  TWR_UART_SETTING_8O2 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_2,
86 
88  TWR_UART_SETTING_8N1_5 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_15,
89 
91  TWR_UART_SETTING_8E1_5 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_EVEN | _TWR_UART_SETTING_STOP_BIT_15,
92 
94  TWR_UART_SETTING_8O1_5 = _TWR_UART_SETTING_DATA_BITS_8 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_15,
95 
97  TWR_UART_SETTING_7N1 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_1,
98 
100  TWR_UART_SETTING_7E1 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_EVEN | _TWR_UART_SETTING_STOP_BIT_1,
101 
103  TWR_UART_SETTING_7O1 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_ODD | _TWR_UART_SETTING_STOP_BIT_1,
104 
106  TWR_UART_SETTING_7N2 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_2,
107 
109  TWR_UART_SETTING_7E2 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_EVEN | _TWR_UART_SETTING_STOP_BIT_2,
110 
112  TWR_UART_SETTING_7O2 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_2,
113 
115  TWR_UART_SETTING_7N1_5 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_15,
116 
118  TWR_UART_SETTING_7E1_5 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_EVEN | _TWR_UART_SETTING_STOP_BIT_15,
119 
121  TWR_UART_SETTING_7O1_5 = _TWR_UART_SETTING_DATA_BITS_7 | _TWR_UART_SETTING_PARITY_NONE | _TWR_UART_SETTING_STOP_BIT_15
122 
124 
126 
127 typedef enum
128 {
131 
134 
137 
139 
143 
145 
148 
149 void twr_uart_deinit(twr_uart_channel_t channel);
150 
156 
157 size_t twr_uart_write(twr_uart_channel_t channel, const void *buffer, size_t length);
158 
165 
166 size_t twr_uart_read(twr_uart_channel_t channel, void *buffer, size_t length, twr_tick_t timeout);
167 
172 
173 void twr_uart_set_event_handler(twr_uart_channel_t channel, void (*event_handler)(twr_uart_channel_t, twr_uart_event_t, void *), void *event_param);
174 
179 
180 void twr_uart_set_async_fifo(twr_uart_channel_t channel, twr_fifo_t *write_fifo, twr_fifo_t *read_fifo);
181 
187 
188 size_t twr_uart_async_write(twr_uart_channel_t channel, const void *buffer, size_t length);
189 
195 
197 
202 
204 
210 
211 size_t twr_uart_async_read(twr_uart_channel_t channel, void *buffer, size_t length);
212 
214 
215 #endif // _TWR_UART_H
uint64_t twr_tick_t
Timestamp data type.
Definition: twr_tick.h:16
twr_uart_channel_t
UART channels.
Definition: twr_uart.h:14
void twr_uart_init(twr_uart_channel_t channel, twr_uart_baudrate_t baudrate, twr_uart_setting_t setting)
Initialize UART channel.
Definition: twr_uart.c:54
size_t twr_uart_async_write(twr_uart_channel_t channel, const void *buffer, size_t length)
Add data to be transmited in async mode.
Definition: twr_uart.c:418
void twr_uart_set_async_fifo(twr_uart_channel_t channel, twr_fifo_t *write_fifo, twr_fifo_t *read_fifo)
Set buffers for async transfers.
Definition: twr_uart.c:412
size_t twr_uart_write(twr_uart_channel_t channel, const void *buffer, size_t length)
Write data to UART channel (blocking call)
Definition: twr_uart.c:314
bool twr_uart_async_read_start(twr_uart_channel_t channel, twr_tick_t timeout)
Start async reading.
Definition: twr_uart.c:465
twr_uart_event_t
Callback events.
Definition: twr_uart.h:128
twr_uart_baudrate_t
UART baudrate.
Definition: twr_uart.h:29
void twr_uart_set_event_handler(twr_uart_channel_t channel, void(*event_handler)(twr_uart_channel_t, twr_uart_event_t, void *), void *event_param)
Set callback function.
Definition: twr_uart.c:406
bool twr_uart_async_read_cancel(twr_uart_channel_t channel)
Cancel async reading.
Definition: twr_uart.c:521
size_t twr_uart_async_read(twr_uart_channel_t channel, void *buffer, size_t length)
Get data that has been received in async mode.
Definition: twr_uart.c:561
size_t twr_uart_read(twr_uart_channel_t channel, void *buffer, size_t length, twr_tick_t timeout)
Read data from UART channel (blocking call)
Definition: twr_uart.c:362
void twr_uart_deinit(twr_uart_channel_t channel)
Deinitialize UART channel.
Definition: twr_uart.c:237
twr_uart_setting_t
UART setting.
Definition: twr_uart.h:68
@ TWR_UART_UART1
UART channel UART1.
Definition: twr_uart.h:19
@ TWR_UART_UART2
UART channel UART2.
Definition: twr_uart.h:22
@ TWR_UART_UART0
UART channel UART0.
Definition: twr_uart.h:16
@ TWR_UART_EVENT_ASYNC_READ_DATA
Event is reading done.
Definition: twr_uart.h:133
@ TWR_UART_EVENT_ASYNC_READ_TIMEOUT
Event is timeout.
Definition: twr_uart.h:136
@ TWR_UART_EVENT_ASYNC_WRITE_DONE
Event is writting done.
Definition: twr_uart.h:130
@ TWR_UART_BAUDRATE_38400
UART baudrat 38400 bps.
Definition: twr_uart.h:37
@ TWR_UART_BAUDRATE_921600
UART baudrat 921600 bps.
Definition: twr_uart.h:46
@ TWR_UART_BAUDRATE_57600
UART baudrat 57600 bps.
Definition: twr_uart.h:40
@ TWR_UART_BAUDRATE_115200
UART baudrat 115200 bps.
Definition: twr_uart.h:43
@ TWR_UART_BAUDRATE_19200
UART baudrat 19200 bps.
Definition: twr_uart.h:34
@ TWR_UART_BAUDRATE_9600
UART baudrat 9600 bps.
Definition: twr_uart.h:31
@ TWR_UART_SETTING_8N1_5
8N1_5: 8 data bits, none parity bit, 1.5 stop bits
Definition: twr_uart.h:88
@ TWR_UART_SETTING_8E2
8E2: 8 data bits, even parity bit, 2 stop bit
Definition: twr_uart.h:82
@ TWR_UART_SETTING_8O1
8O1: 8 data bits, odd parity bit, 1 stop bit
Definition: twr_uart.h:76
@ TWR_UART_SETTING_7O1
7O1: 7 data bits, odd parity bit, 1 stop bit
Definition: twr_uart.h:103
@ TWR_UART_SETTING_8O2
8O2: 8 data bits, odd parity bit, 2 stop bit
Definition: twr_uart.h:85
@ TWR_UART_SETTING_7N2
7N2: 7 data bits, none parity bit, 2 stop bits
Definition: twr_uart.h:106
@ TWR_UART_SETTING_8N1
8N1: 8 data bits, none parity bit, 1 stop bit
Definition: twr_uart.h:70
@ TWR_UART_SETTING_7N1
7N1: 7 data bits, none parity bit, 1 stop bit
Definition: twr_uart.h:97
@ TWR_UART_SETTING_8E1
8E1: 8 data bits, even parity bit, 1 stop bit
Definition: twr_uart.h:73
@ TWR_UART_SETTING_7E1_5
7E1_5: 7 data bits, even parity bit, 1.5 stop bit
Definition: twr_uart.h:118
@ TWR_UART_SETTING_8O1_5
8O1_5: 8 data bits, odd parity bit, 1.5 stop bit
Definition: twr_uart.h:94
@ TWR_UART_SETTING_8E1_5
8E1_5: 8 data bits, even parity bit, 1.5 stop bit
Definition: twr_uart.h:91
@ TWR_UART_SETTING_7N1_5
7N1_5: 7 data bits, none parity bit, 1.5 stop bits
Definition: twr_uart.h:115
@ TWR_UART_SETTING_7E2
7E2: 7 data bits, even parity bit, 2 stop bit
Definition: twr_uart.h:109
@ TWR_UART_SETTING_8N2
8N2: 8 data bits, none parity bit, 2 stop bits
Definition: twr_uart.h:79
@ TWR_UART_SETTING_7E1
7E1: 7 data bits, even parity bit, 1 stop bit
Definition: twr_uart.h:100
@ TWR_UART_SETTING_7O2
7O2: 7 data bits, odd parity bit, 2 stop bit
Definition: twr_uart.h:112
@ TWR_UART_SETTING_7O1_5
7O1_5: 7 data bits, odd parity bit, 1.5 stop bit
Definition: twr_uart.h:121
Structure of FIFO instance.
Definition: twr_fifo.h:13